Principal Digital IC Design Engineer
- Entreprise
- Michael Page
- Lieu
- Neuchâtel
- Date de publication
- 10.09.2025
- Référence
- 4966502
Description
- Global semiconductor company
- Hub of design excellence
About Our Client
Our client is a leading global provider of intelligent semiconductor solutions, driving innovation in energy efficiency, advanced computing, and smart technologies. With a strong international presence, they offer engineers the opportunity to shape future-focused products while growing their careers in a collaborative and inclusive environment.
Job Description
In this role, the Principal Digital IC Design Engineer will:
- Architect, specify, implement, simulate, and benchmark MCU, DSP systems, and hardware accelerators
- Lead the development of digital blocks, IPs, and peripheral IPs with a strong focus on digital design
- Act as a technical lead, consulting integration teams on the definition and use of these systems
- Support verification and FPGA prototyping activities
- Coordinate SDK development with software teams
- Drive project activities, contributing to methodology and design flow improvements
- Mentor and support junior engineers
The Successful Applicant
What Principal Digital IC Design Engineer will need
- BS/MS in Electrical Engineering or related technical discipline
- 10+ years' experience in semiconductor product development with leadership exposure
- Strong expertise in digital design, including RTL design of digital IP blocks and systems in Verilog/SystemVerilog
- Experience with embedded CPUs (ARM Cortex, DSP) and AMBA bus protocols (AHB/APB)
- Excellent communication skills in English (written and verbal)
- Eligibility to work in Switzerland
What Else Principal Digital IC Design Engineer may bring
- Experience in project or task leadership
- Background in DSP, digital peripheral IP development, or accelerator design
- Knowledge of CPU/MCU subsystem design, SystemRDL or IP-XACT
- Programming skills in Python (automation) and C/C++ (embedded software)
- Familiarity with design intent (timing constraints/SDC, power intent/UPF)
- Understanding of RTL-to-GDS flows (synthesis, PnR, STA, power analysis)
- Advanced verification.
What's on Offer
- A collaborative, friendly, and team-oriented environment
- Opportunities for continual learning and career growth
- The chance to work on exciting international projects
- 25 vacation days per year and a highly competitive benefits package
- Support for volunteering and charitable programmes
- A culture that embraces diversity, inclusion, and social responsibility
Quote job ref
JN-092025-6824626
Job Function
Engineering & Manufacturing
Specialisation
Engineering Design and R&D
Industry
Industrial / Manufacturing
Location
Neuchâtel
Contract Type
Permanent
Job Reference
JN-092025-6824626