Analog Layout Engineer
- Entreprise
- Kandou Bus SA
- Lieu
- St-Sulpice VD
- Date de publication
- 16.05.2023
- Référence
- 4348730
Description
CDI to 100% immediately or to be agreed.
Postulation uniquement en ligne - merci de mentionner sous source (ORP)
Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too. If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.
We are actively seeking an Analog Layout Engineer based in Lausanne.
Key Responsibilities:
Position in custom layout and verification of analog circuits, cells, blocks and IP for multi-Gigabit high speed chip to chip communication links (SerDes up to and beyond 28Gb/s and/or memory IO) in advanced semiconductor technology nodes
Layout and verification of high-speed analog circuits
Interact closely with the design and EDA teams to understand requirements and implement solutions
Regular reporting to management team
Experience:
Experience in custom analog layout of circuits and blocks
Ideally, experience in layout of high-speed circuits including amplifiers, oscillators, phase-locked loops, biasing, buffers, regulators, filters, data converters or similar
Understanding of layout approaches and techniques for high-speed circuitry, matching constraints, minimization of parasitics, power grids and ESD requirements
Understanding of Layout Dependent Effects
Ideally, experience on modern semiconductor process technologies including 16nm & 7nm
Use of EDA tools for design and verification like Cadence Virtuoso, Pegasus, Spectre/HSpice, Calibre DRC/LVS, etc.
Experience in SKILL, Tcl, Python or other coding languages would be beneficial
Knowledge of version control and tagging methodologies
Skills:
Self-motivated, with strong sense of ownership and responsibility
Good communicator and team player
Manage workload and schedules
Qualifications:
Graduate in E.E. or related field
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It!
ONLINE APPLICATION directly to the employer via the following link: https://kandou.bamboohr.com/careers/223
Postulation uniquement en ligne - merci de mentionner sous source (ORP)
Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too. If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.
We are actively seeking an Analog Layout Engineer based in Lausanne.
Key Responsibilities:
Position in custom layout and verification of analog circuits, cells, blocks and IP for multi-Gigabit high speed chip to chip communication links (SerDes up to and beyond 28Gb/s and/or memory IO) in advanced semiconductor technology nodes
Layout and verification of high-speed analog circuits
Interact closely with the design and EDA teams to understand requirements and implement solutions
Regular reporting to management team
Experience:
Experience in custom analog layout of circuits and blocks
Ideally, experience in layout of high-speed circuits including amplifiers, oscillators, phase-locked loops, biasing, buffers, regulators, filters, data converters or similar
Understanding of layout approaches and techniques for high-speed circuitry, matching constraints, minimization of parasitics, power grids and ESD requirements
Understanding of Layout Dependent Effects
Ideally, experience on modern semiconductor process technologies including 16nm & 7nm
Use of EDA tools for design and verification like Cadence Virtuoso, Pegasus, Spectre/HSpice, Calibre DRC/LVS, etc.
Experience in SKILL, Tcl, Python or other coding languages would be beneficial
Knowledge of version control and tagging methodologies
Skills:
Self-motivated, with strong sense of ownership and responsibility
Good communicator and team player
Manage workload and schedules
Qualifications:
Graduate in E.E. or related field
If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It!
ONLINE APPLICATION directly to the employer via the following link: https://kandou.bamboohr.com/careers/223